+incdir+${DESIGN_RTL_DIR}/fpnew/src/common_cells/include

${DESIGN_RTL_DIR}/fpnew/src/common_cells/include/common_cells/registers.svh
${DESIGN_RTL_DIR}/fpnew/src/fpnew_pkg.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_cast_multi.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_classifier.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_divsqrt_multi.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_fma.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_fma_multi.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_noncomp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_opgroup_block.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_opgroup_fmt_slice.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_opgroup_multifmt_slice.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_rounding.sv
${DESIGN_RTL_DIR}/fpnew/src/fpnew_top.sv

${DESIGN_RTL_DIR}/fpnew/src/common_cells/src/lzc.sv
${DESIGN_RTL_DIR}/fpnew/src/common_cells/src/rr_arb_tree.sv

${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
${DESIGN_RTL_DIR}/fpnew/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
